Case Studies
Real IO lists in, real compiled output out.
EngineeredIQ doesn't have public customer references yet. Rather than write a testimonial we can't back up, here are two real runs of the actual compiler, against real project fixtures, with client and site details removed. Every number below is real output, not an estimate.
Water & Wastewater
A water treatment plant automation upgrade
Before
A functional design specification and IO list spread across a Word document, an Excel tag register and a separate interlock matrix, with no cross-referencing between them and no record of who confirmed what.
After
One structured FDSIQ project, compiled straight into a ScaffIQ scaffold and Sequence Engine logic, with every tag and interlock traceable back to the confirmed IO list.
137
tags compiled
15
equipment modules
8
interlocks
346
PLC rungs generated
Actual generated rung
EQU(SEQ_Backwash_State,1) XIO(INTLK_High_Level_Trip_Active) OTL(XV_Backwash_Inlet);
Client and site details removed. Figures are real output from an actual FDSIQ → ScaffIQ → Sequence Engine run against this project's fixture data.
Food & Beverage
A CIP wash system, scaffolded and sequenced
Before
Fill, agitate, drain and rinse sequences hand-typed into ladder logic from memory, project after project, with no shared source of truth for the interlock pattern between phases.
After
Two confirmed state machines (Fill and Agitate, Drain and Rinse) compiled directly into reviewed, engineer-editable rung logic, gated by the same three-checkpoint sign-off every ScaffIQ project goes through.
2
state machines
45
PLC rungs generated
3
checkpoints signed off
0
rungs written by AI
Actual generated rung
EQU(SEQ_Fill_and_Agitate_State,2) TON(SEQ_Fill_and_Agitate_T2,300000,0);
Synthetic test-harness fixture, not a real client engagement. Figures are real output from an actual ScaffIQ Sequence Engine run against this fixture.
Want to see it run against your own IO list?
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User Specs & Requirements
Qualified engineers only.
EngineeredIQ products are built for qualified engineers (Controls, Process Control, Systems Integration, EI&C or Applications), not as a substitute for one. The Engineer of Record must review and authorise every generated output before it reaches a live system, accepting full professional responsibility for the result.